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Application of guard traces with vias in the RF PCB layout

机译:保护痕迹在射频PCB布局中的应用

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In this paper we discuss the affection of the guard traces (shown in Figure 3) with vias to the function of the parallel double micro-strip lines in the PCB layout, the structure of the parallel double micro-strip' line is treated as a symmetrical network with 4 ports, simulation on the S parameters is processed, from the S parameters we can analyze the effect of the guard trace, then get the conclusion that the guard trace with vias is helpful to decrease the coupling strength between the double micro-strip lines.
机译:在本文中,我们讨论了PCB布局中并联双微条线的透支的保护迹线(如图3所示)的影响,并联双微带线的结构被视为一个具有4个端口的对称网络,在S参数上进行仿真,从S参数下我们可以分析保护迹线的效果,然后得出的结论是通过通孔的护罩跟踪有助于降低双微米之间的耦合强度条线。

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