System Testability Modeling and Analysis Based on Device Level Failure Mode Effect and Criticality Analysis

摘要

The testability of equipment has become the key factor affecting equipment availability, and detracts from readiness and mission success. To overcome the current problems associated with the analysis of equipment testability, such as non-comprehensive failure mode coverage, low fault detection rate, and low fault location accuracy, this paper presents a system testability modeling and analysis method based on a summary of the results of device level failure mode effect and criticality analysis (FMECA), which is developed according to the failure data of components and a hardware impact analysis. In particular, we present a mathematical multi-signal model, quantitative methods and mathematical models of system testability, and the implementation processes of system testability modeling. The proposed method allows the failure modes of a module to be obtained accurately and comprehensively. By functioning at the device level, the method provides good fault location accuracy, and improves the authenticity of system testability analysis results. Finally, the testability of an actual electronic system is conducted using CARMES, which is a widely used reliability engineering software. The results verify the effectiveness and authenticity of the presented method, which can also provide a reference for the testability modeling and analysis of follow-up system design.