A full differential low-voltage, low-power, and high-speed CMOS current comparator has been designed. The circuit is implemented using 0.5 /spl mu/m CMOS technology and simulated using HSPICE. The comparison is performed in just one clock cycle with a sampling rate of 600 MHz, and can sense currents down to 0.1 /spl mu/A (without considering the offset). The amount of offset obtained using Monte Carlo simulation is absolutely less than 0.4 /spl mu/A for 95% of the cases. Power dissipation is less than 1 mW.
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机译：设计了全差分低压，低功耗和高速CMOS电流比较器。电路使用0.5 / SPL MU / M CMOS技术和使用HSPICE进行模拟。比较在仅具有600MHz的采样率的时钟周期中执行，并且可以向0.1 / SPL MU / A感测电流（不考虑偏移）。使用Monte Carlo模拟获得的偏移量绝对小于0.4 / SPL MU / A，为95％的情况。功耗小于1兆瓦。
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