This paper describes switch network architecture for Synchronous Digital Hierarchy BDCS (Broadband Digital Cross-Connect System), automatic detection of connection matrix status for AU3/4 of switching unit under it, detection of transmission error between unit switches and transmission error for switching routing path. It expands T switch spatially in existing T-S-T switch to make switch network architecture simple and makes strictly non-blocking switch network demanded by most of BDCS. The switch network is composed of unit switch, capable of switching to time and space and being applied to T switch and S switch in T-S-T switch.
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