Thetis: Reducing overheads in distributed shared memory systems

摘要

Ease of programming is driving research into shared memory machines. There are two major overheads in a shared memory machine: keeping processor caches coherent and managing the multiple threads of computation which enable the system to tolerate very long memory latencies associated with distributed memories. This paper describes Thetis - a hybrid architecture designed to provide both shared memory and efficient message passing. Thetis, which will be built entirely from 'commodity' components, consists of sites containing a small number of computation processors and a separate, programmable auxillary processor. The auxillary processor will be responsible for overhead tasks such as maintenance of cache directories, management of memory and thread queues. The auxillary processor is placed on a separate bus, so that its operations do not block or delay memory accesses from computation processors which are not waiting for its services.