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An analog floating-gate memory in a standard digital technology

机译:标准数字技术中的模拟浮动栅极存储器

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In this paper we present a simple CMOS analog memory structure using the floating gate of a MOS transistor. The structure is based on a special but simple layout which allows significant tunneling at relatively low voltage levels. The programming of the memory is achieved using the standard Fowler-Nordheim tunneling and is implemented in a standard digital CMOS process with only one polysilicon layer. A simple on-chip memory driver circuit is also presented. Experimental results from test chips fabricated in a standard 2-micron CMOS process show six orders of magnitude dynamic range in current for subthreshold operation.
机译:在本文中,我们使用MOS晶体管的浮栅呈现简单的CMOS模拟存储器结构。该结构基于特殊但简单的布局,允许在相对低的电压水平下进行显着的隧道。使用标准Fowler-Nordheim隧道实现存储器的编程,并在标准数字CMOS过程中仅具有一个多晶硅层。还提出了一个简单的片上存储器驱动器电路。标准2微米CMOS工艺中制造的试验芯片的实验结果显示了用于亚阈值操作的电流中的六个幅度动态范围。

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