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Predictive sequential associative cache

机译:预测顺序关联缓存

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摘要

In this paper we propose a cache design that provides the same miss rate as a two-way set associative cache, but with an access time closer to a direct-mapped cache. As with other designs, a traditional direct-mapped cache is conceptually partitioned into multiple banks, and the blocks in each set are probed, or examined, sequentially. Other designs either probe the set in a fixed order or add extra delay in the access path for all accesses. We use prediction sources to guide the cache examination, reducing the amount of searching and thus the average access latency. A variety of accurate prediction sources are considered, with some being available in early pipeline stages. We feel that our design offers the same or better performance and is easier to implement than previous designs.
机译:在本文中,我们提出了一种缓存设计,它提供与双向设置关联高速缓存相同的未命中率,但是使用较近直接映射缓存的访问时间。与其他设计一样,传统的直接映射高速缓存被概念性地分区为多个存储体,并且逐行探测或检查每个集合中的块。其他设计要么以固定的顺序探测设置,也可以在所有访问的访问路径中添加额外延迟。我们使用预测源来指导高速缓存检查,从而减少搜索量,从而降低平均访问延迟。考虑了各种精确的预测来源,有些在早期管道阶段提供。我们认为,我们的设计提供了相同或更好的性能,而且比以前的设计更容易实现。

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