An ultra wide bandwidth power divider on MMIC operating 4 to 10 GHz

摘要

A circuit topology is presented for realizing power dividers with bandwidths of 2.5:1 or greater on MMIC. This topology consists of lumped-element interconnected networks and is thus ideally suited for MMIC technology. This proposed minimum-element topology favors component values that are easily realizable and thus minimize losses due to low-Q elements. A three-way divider was fabricated that achieved 5.8-dB nominal insertion loss and 18-dB isolation form 4 to 10 GHz. The circuit was designed on a 60-mil*60-mil chip and included RF probe pads at each port to allow measurement of on-chip performance. all circuit components were realized as MIM capacitors. NiCr resistors, and air bridge inductors. A short length of high-impedance transmission line was included at the input on the divider to compensate for the parasitic nature of the lumped elements. Excellent agreement was obtained between measured and predicted performance.