IEEE recommended practice for powering and grounding electronic equipment. (Color Book Series - Emerald Book)

摘要

This paper presents a novel approach to estimate the I_DDQ current in faulty CMOS integrated circuits. This new methodologyis not based on the prior knowledge of the faulty device resistance.Instead of that, our approach proposes the characterization of thefaulty circuit quiescent current with respect to an output voltage rangecharacterized by the designer to be defective. This output voltage isdefined by the designer in order to meet some desirable qualityrequirements for the circuit on the design, such as the minimumacceptable noise immunity and maximum time delay. For the design ofbuilt-in current sensors, these quality requirements define the minimumcurrent resolution