Parallel flash comparators are widely employed for digitisingtelevision images in real-time and the parallel flash recognitionhardware (FRH) described maintains the same speed for image recognitionby operating at the same pixel sampling rate, typically 5-10 MHz. Theimage processing time is thus at most 200 ns and recognition resultsobtained at the currently digitised pixel are available for display atthe next pixel on the same TV line. The speed is thus the theoreticalmaximum for conventional scanning and the hardware is designed by CADmethods for defined windows up to 16×16 pixels, located at allpossible pixel positions in the TV image. Preprocessing of the flash ADCgrey scale binary coded output includes gradient detection and threshold
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