Concurrent error-detection and modular fault-tolerance in a 32-bitprocessing core for embedded space flight applications

摘要

This paper describes the concurrent error-detection methodsemployed in the ERC32, a 32-bit processing core for embedded spaceflight applications. The processor core consists of three devices; aninteger unit, a floating point unit and a memory controller. All threedevices are provided with internal concurrent error-detection, mainly todetect transient errors. Over 98% of all latched errors are detected.Depending on the error location, errors can be removed by instructionretry or by software intervention without loss of context. A programflow control mechanism is provided to detect execution anomalies due toundetected errors. To further increase the error-detection coverage,each device can be operated in master/checker mode