Real time on-chip characterization of time delay arising frommulti-level-metallization: decoupling of pure charging anddrift-and-charging

摘要

Time delay, τ_D due to MLM is systematicallycharacterized in circuit operating conditions. Novel utilization ofsimple test patterns is shown to enable: (a) separation of pure chargingand drift-and-charging contributions to τ_D, hence, (b)fast and accurate quantification of τ_D in the limit ofsuperconducting metal lines or low temperature operation, and (c)dynamic extraction of MLM parameters and their contribution toτ_D