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Characterization of multiple deep level systems in semiconductor junctions by capacitance measurements

机译:通过电容测量表征半导体结中的多个深层系统

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Capacitance and conductance of junction devices are modified by deep lying impurities in the semiconductor and should therefore in principle be useful for determining deep level parameters, viz, the concentration, the depth of the energy level from the conduction band and the capture cross section of the impurity species present. However, the presence of deep lying impurities in junction devices has been frequently ignored because of difficulties in handling the problem. We show that when deep lying impurities act as majority carrier traps expressions for capacitance and conductance (imaginary capacitance) can be obtained as a solution of a simple different equation.
机译:结器件的电容和电导率会因半导体中的深层杂质而改变,因此原则上应可用于确定深能级参数,即导带的能级深度和俘获横截面的能级浓度,浓度,能级深度。存在杂质。但是,由于难以处理该问题,因此经常会忽略接合器件中存在深层杂质的情况。我们表明,当深层杂质充当多数载流子陷阱时,可以通过简单的不同方程式的解来获得电容和电导(虚电容)的表达式。

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