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Response Speed of Negative Capacitance FinFETs

机译:负电容FinFET的响应速度

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We report on the measurement of a 101-stage ring oscillator (RO) consisting of state-of-the-art 14 nm FinFET devices with a ferroelectric gate layer that exhibits negative capacitance. We show that the gate stage delay as a function of applied voltage can be directly modeled from DC characteristics of the individual NC-nFET and NC-pFET devices that constitute the RO, thereby demonstrating that there is no slowdown of the NC effect at the highest speed tested - per-stage delay as small as 7.2 ps.
机译:我们报告了由最先进的14 nm FinFET器件组成的101级环形振荡器(RO)的测量结果,该器件具有显示负电容的铁电栅极层。我们表明,可以根据构成RO的单个NC-nFET和NC-pFET器件的直流特性直接模拟栅极级延迟与施加电压的关系,从而证明最高的NC效应不会减慢速度测试-每级延迟小至7.2 ps。

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