A 250MHz 60dB gain control range 1dB gain step programmable gain amplifier with DC-offset calibration

摘要

A broadband programmable gain amplifier (PGA) for wireless communication is presented in this paper. The PGA is carried out by improved parallel feedback based flipped voltage follower (FLV) to achieve wide dynamic range of gain, wide bandwidth, as well as low noise and high linearity. It is implemented with a topology consisting of three coarse gain adjustment stages cascaded by a fine gain control stage. The chip also includes novel analog DC-offset calibration (DCOC) units and a digital serial peripheral interface (SPI) to generate the calibration enable and gain control words. By using the bandwidth extension technique, the proposed design obtains a broad 0~60dB linear-in-decibel gain range 1dB gain step with a 3dB bandwidth up to 250MHz. The measured gain error achieves less than 0.3dB, the input 1dB compression point is -1dBm and -61dBm respectively at 0dB and 60dB gain mode, meanwhile the in-band IIP3 is +10.1dBm and -50.2dBm. Fabricated in 0.13μm CMOS process, the PGA has a total area with bonding pads of 0.73×0.55 mm2. The power consumption is 16.6mA from a 1.2V supply including 5mA of the output buffers to diver 50Ω.