A 0.022mm2 98.5dB SNDR hybrid audio delta-sigma modulator with digital ELD compensation in 28nm CMOS

摘要

An area-efficient hybrid ΔΣ modulator with a 6-bit shared asynchronous successive approximation register (ASAR) quantizer for audio application is proposed and demonstrated in a 28nm CMOS process. The modulator incorporates a 1-order analog filter and a 1-order digital filter, which enables high integration of digital signal processing at low power and small area. The 1-order digital filter is developed to replace the second analog integrator and results in significant area reduction. Moreover, the proposed digital filter provides digital excess loop delay (ELD) compensation and eliminates the conventional analog ELD feedback DAC. In addition, R-DAC is adopted to alleviate the flicker noise issue in 28nm process. The measured result shows 98.5dB SNDR and 100.6dB DR within 24kHz bandwidth, while occupying 0.022mm and achieving a FoM of 343fJ/conv. (Power/(2BW·2)) or 173.8dB (DR+10*log(BW/Power)).