FP-map-an approach to the functional pipelining of embeddedprograms

摘要

Practice shows that increasing the amount of instruction levelparallelism offered by an architecture (like adding instruction slots toVLIW instructions) does not necessarily lead to significant performancegains. Instead, high hardware costs and inefficient use of this hardwaremay occur. Mapping embedded applications onto multiprocessor systemsforms a very interesting extension to ILP. We propose a functionalpipelining approach to the mapping of embedded programs written in ANSIC onto a pipeline of application specific processors. Our novelfunctional pipelining algorithm has low computational complexity and wasespecially developed to form the parallelization engine of a (semi)automatic system for multiprocessor embedded system design. The paperexplains the proposed algorithm and demonstrates its applicability