首页> 外文会议>Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International >A 65 nm CMOS technology with a high-performance and low-leakage transistor, a 0.55 μm2 6T-SRAM cell and robust hybrid-ULK/Cu interconnects for mobile multimedia applications
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A 65 nm CMOS technology with a high-performance and low-leakage transistor, a 0.55 μm2 6T-SRAM cell and robust hybrid-ULK/Cu interconnects for mobile multimedia applications

机译:65 nm CMOS技术,高性能和低泄漏晶体管,0.55μm 2 6T-SRAM单元以及用于移动多媒体应用的强大的混合ULK / Cu互连

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This paper presents a 65 nm CMOS technology for mobile multimedia applications. The reduction of interconnect capacitance is essential for high-speed data transmission and small power consumption for mobile core chips. We have chosen a hybrid ULK structure which consists of NCS (nano-clustering silica; k=2.25) at the wire level and SiOC (k=2.9) at the via level. Although NCS is a porous material, the NCS/SiOC structure has sufficient mechanical strength to endure CMP pressure and wire bonding. Successfully fabricated 200 nm-pitch hybrid-ULK/Cu interconnects and a high-performance and low-leakage transistors meet the electrical targets from the circuit requirements. Moreover, an embedded 6T-SRAM with a 0.55 μm2 small cell size has been achieved.
机译:本文提出了一种用于移动多媒体应用的65 nm CMOS技术。互连电容的减少对于高速数据传输和移动核心芯片的小功耗至关重要。我们选择了一种混合ULK结构,该结构由线级的NCS(纳米簇二氧化硅; k = 2.25)和通孔级的SiOC(k = 2.9)组成。尽管NCS是多孔材料,但NCS / SiOC结构具有足够的机械强度以承受CMP压力和引线键合。成功制造的200 nm节距的ULK / Cu混合互连以及高性能和低泄漏晶体管可满足电路要求中的电气目标。而且,已经实现了具有0.55μm 2 小单元尺寸的嵌入式6T-SRAM。

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