From device modeling to characterization: a complete end to end design flow for SiC devices half bridge design

摘要

By using I-V curve tracer and double pulse test results on a SIC device a modified Angelov model was generated, which was used to simulate the overshoot and ringing in the time domain of a half bridge test board. The layout parasitic effects of the printed circuit boards have been taken into consideration by an EM extracted model (S-parameters) used in co-simulation within the transient simulation, including an adoption of the models for passive elements and active devices. The modeling approach was proven as well as the accuracy of the whole design flow to predict the device behavior on any application board by simulation before building a prototype.