Performances Improvement of Tunneling Field-Effect Transistors' with the Advanced Double-Gate PN Construction

摘要

Via the Sentaurus TCAD of 2D device simulation, the PN junction of Double-Gate Tunneling Field-Effect Transistor (PN-DGTFET) with the junctionless concept is investigated in this paper. The results demonstrate a PN-DGTFET of the source region completely overlapped with the gate region can effectively improve on-state current. This PN-DGTFET structure is major relies on the traditional band-to-band tunneling mechanism, and the minimum SS value can reach 8.83mV/decade, the average SS value can get 16.0mV/decade, the ION/IOFF ratio can achieve $5.98 imes 10^{8}$, and this device PN stack architecture can successfully reduce the manufacturing cost. Here, it can be found that reduction the drain region and parallel with the gate oxide layer, which can quickly create the depletion region and easily happen the tunneling switch-on state.