A 108-dB DR 103-dB SNR Delay-Time Chopper Stabilization Audio CT ΔΣ Modulator

摘要

This paper presents a low-noise M&NEMS microphone. The resistive accelerometer and the electronic interface are respectively a silicon nanowires and a fourth-order single-bit Continuous-Time (CT) ΔΣ modulator. The study and analysis of the M&NEMS microphone noise is carefully reported. To eliminate the offset and 1/f noise of the first integrator, Chopper Stabilization (CHS) technique is implemented around this block. The CT ΔΣ modulator is implemented in a 65-nm CMOS technology. The supply voltage is 1.2-V while the power consumption is 370-µW and the core area is 0.4-mm². The circuit was fabricated and measured. From measurement results over a signal bandwidth of 20-kHz, it achieves a peak signal-to-noise ratio (SNR) of 103-dB, a peak signal-to-noise and distortion ratio (SNDR) of 102-dB and a dynamic range (DR) of 108-dB.