Synchronous Reference Frame Paralleled MAF/DSC-Based PLL

摘要

To design an effective PLL with fast transient response and good filtering capability for adverse voltage conditions is the object of this paper. The cascaded filters used in many existed MAF-based PLLs cause a considerable phase delay. In this paper, paralleled filter units, which consists of moving average filter (MAF) and modified delayed signal cancellation (DSC) operator, is employed in QT1-PLL structure to reject the voltage disturbance in synchronous reference frame. The paralleled filtering structure can offer a satisfactory dynamic performance. The effectiveness of the proposed PLL is confirmed through numerical results.