Design and Analysis of a Low-Power 60~113 GHz CMOS Down-Conversion Mixer with High Conversion Gain

摘要

A 60~113 GHz CMOS down-conversion mixer is demonstrated. The mixer adopts an RL core IF load, which is based on the series of a peaking inductor (L) and a parallel combination of the cross-coupled PMOS transistors (CCPT) and the diode-connected NMOS transistors (DCNT), i.e. L-CCPT-DCNT-based core IF load. Conversion gain (CG) can be enhanced due to the increase of load impedance. The bandwidth can be improved due to the inductive peaking effect. The mixer consumes 3.2 mW and achieves RF-port input reflection coefficient of -10~ -31.2 dB for 82.8~97.2 GHz. The mixer attains CG of 16.8±1.5 dB for 60~113 GHz. The corresponding 3 dB CG bandwidth is 53 GHz. Moreover, for 70~100 GHz, the mixer achieves CG of 17.4~18.3 dB and LO-RF isolation of 39.2~54.4 dB, one of the best CG and LO-RF isolation results ever reported for down-conversion mixers around 77 GHz or 94 GHz.