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NVDIMM-C: A Byte-Addressable Non-Volatile Memory Module for Compatibility with Standard DDR Memory Interfaces

机译:NVDIMM-C:字节可寻址的非易失性内存模块,用于与标准DDR内存接口兼容

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Currently, there are two representative non-volatile dual in-line memory module (NVDIMM) interfaces: a proprietary Intel DDR-T and the JEDEC NVDIMM-P, which are not supported by existing platforms. Adoption of new platform is costly and measuring its efficiency of migrating to the new platform is much more complex. This study is an alternative way of them—finding a new memory device that can be supported by all existing systems. In this paper, we propose an NVDIMM architecture with several system-wide mechanisms to allow the synchronous DDR4 memory interfaces to support non-deterministic (asynchronous) timing. The proposed memory architecture is implemented as a real device prototype, and also evaluated using synthetic and real workloads on an x86-64 server system.
机译:当前,有两个代表性的非易失性双列直插式内存模块(NVDIMM)接口:专有的Intel DDR-T和JEDEC NVDIMM-P,现有平台不支持。采用新平台的成本很高,而衡量其迁移到新平台的效率则要复杂得多。这项研究是它们的另一种选择-查找可以被所有现有系统支持的新存储设备。在本文中,我们提出了一种具有多个系统范围机制的NVDIMM架构,以允许同步DDR4存储器接口支持非确定性(异步)时序。所提出的内存体系结构被实现为真实的设备原型,并且还在x86-64服务器系统上使用合成的和真实的工作负载进行了评估。

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