An 100-to-110 GHz Low-dc-power Sub-harmonically Injection-Locked Quadrature Oscillator using Stacked Boosting Technique in 90-nm CMOS Process

摘要

A W-band sub-harmonically injection-locked quadrature oscillator is proposed using 90-nm CMOS process in this paper. Based on a stacked boosting technique, the negative resistance of the oscillation core can be highly enhanced. The fundamental oscillation frequency of the proposed quadrature oscillator can be up to 104 GHz with a dc power consumption of 8.5 mW. A transformer coupling is employed to widen the locking range for the sub-harmonically injection-locked operation. With a sub-harmonic number of 3, the measured overall locking range is from 100 to 110 GHz. The measured phase noise at 10 kHz offset is lower than -82 dBc/Hz over the frequency. Compared to the prior art, this work features wide locking range, quadrature outputs, low dc power consumption, and high frequency.