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A Predictive Model to Investigate the Effects of Gate Driver on dV/dt in Series Connected SiC MOSFETs

机译:用于研究栅极驱动器对串联连接的SiC MOSFET的dV / dt影响的预测模型

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Due to the increase of the switching speed of power devices, the impact of the gate driver parasitic capacitances has a influence on the dynamic behaviour in the switching cell. Here, the study is focused on the dynamic behaviour for series-connected SiC-MOSFET devices: a predictive model that considers the parasitic capacitances is developed and compared to simulation results. Then, experimental results validate the proposed modelling.
机译:由于功率器件开关速度的提高,栅极驱动器寄生电容的影响会对开关单元中的动态行为产生影响。在这里,研究集中在串联SiC-MOSFET器件的动态行为上:建立了一个考虑寄生电容的预测模型,并将其与仿真结果进行了比较。然后,实验结果验证了所提出的模型。

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