A High Linearity Low Noise Amplifier for 5G Front-End Modules

摘要

This paper presents a high linearity wide band low noise amplifier for 5G front-end receiver systems. The proposed LNA has two common source stages cascade in current reused topology. An inductor based wideband inter-stage matching network acts to share the bias current, improve the gain and noise figure performance. Besides a series RC network is connected to second stage gate terminal to improve the stability significantly and reduce the return loss. The design of this LNA is demonstrated in 0.5μm GaAs pHEMT process. According to post-layout simulation results, a flat gain and noise figure of 16 dB and 1 dB are achieved respectively for a wide bandwidth of 1.5-5.5 GHz. A 3-dB bandwidth of 6.0 GHz, output P_1dBof +20 dBm and output IP3 of +40 dBm are achieved. The LNA chip size along pads is only 0.64 mm².