Nonlinear Operation of Static-Binary Neuron Circuits and Dynamic Memristive Devices for STDP Learning

摘要

A low-power and stable “static-type” neural network (NN) circuit based on CMOS and resistive synaptic devices was developed and evaluated. The circuit is composed of a comparator as a firing function for binary output, current sources, cross switches for inputs, and variable resistors for synaptic weights. Nonlinearity analysis of operating points in such circuits was performed in terms of the types of current sources and the resistance-change ratios of the variable resistors. The operation window to realize both operation stability and low power consumption of less than 1 mW for 1024 synapses was thus clarified. To improve the NN performance, memristive synaptic devices with WOx/MgO were fabricated and characterized in terms of spike-timing-dependent plasticity and nonlinear switching for learning.