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A 7nm Leakage-Current-Supply Circuit for LDO Dropout Voltage Reduction

机译:用于降低LDO压差的7nm漏电流供电电路

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A 7nm leakage-current-supply (LCS) circuit tracks leakage across process and temperature variations and controls PFET block-head switches (BHS) to supply the slow-changing leakage current while an analog low-dropout (LDO) voltage regulator supplies the fast-changing dynamic current to reduce the LDO maximum current demand (IMAX) and minimum dropout voltage (VDO,MIN). Measurements demonstrate a 70mV (44%) VDO,MIN reduction, enabling 14-22% power savings.
机译:7nm漏电电流(LCS)电路跟踪过程和温度变化之间的漏电,并控制PFET块头开关(BHS)提供缓慢变化的漏电流,而模拟低压降(LDO)稳压器提供快速的漏电改变动态电流以降低LDO最大电流需求(I MAX )和最小压差(V DO,MIN )。测量显示70mV(44%)V DO,MIN 减少功耗,可节省14-22%。

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