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Design and Implementation of BIST

机译:设计与实现

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摘要

BIST is a system in which test patterns are generated to test the circuit. The circuit that needs to be tested is called circuit under test (CUT). If testing is done manually testing phase becomes more crucial one which consumes maximum amount of time and also not economically feasible when compared to the any other phase while fabricating the device or IC to overcome this problem BIST is used. This paper discusses design and implementation of BIST for testing the four bit combinational logic circuit and also the calculation golden signature value. The system consists of LFSR (Linear Feedback Shift Register), CUT (Circuit under Test), signature analyzer and a comparator. LFSR is a pattern generator which generates 2n-1 combinations of test patterns, which are then applied to the CUT at the negative rising edge of the CLK. The output of the CUT is applied to the signature analyzer at positive edge of CLK1. Comparator compares the output of the signature analyzer with the golden signature value. If the output of comparator is equal to one, it implies that CUT is fault free if not there is fault present in CUT. Signature analyzer generates two distinct signature values for fault free CUT and faulty CUT.
机译:BIST是生成测试模式以测试电路的系统。需要测试的电路被称为被测电路(切割)。如果手动进行测试,测试阶段变得更加关键,并且与任何其他阶段相比,在制造设备或IC以克服该问题BIST时,在任何其他阶段相比,在任何其他阶段相比,消耗最大时间,并且在经济上不可行。本文讨论了对测试四位组合逻辑电路的BIST的设计和实现以及计算金色签名值。该系统由LFSR(线性反馈移位寄存器)组成,剪切(测试电路),签名分析器和比较器。 LFSR是一种模式生成器,它产生2 n-1 测试图案的组合,然后将其施加到CLK的负上升沿处的切口。切割的输出应用于CLK1的正边缘的签名分析仪。比较器将签名分析仪的输出与金色签名值进行比较。如果比较器的输出等于一个,则表示在没有切割中存在故障,则剪切无故障。签名分析器为故障切割和故障切割产生两个不同的特征值。

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