Method to Model Input Voltage Ripple in Multi-Domain Fully Integrated Voltage Regulators

摘要

The on-chip power domains of the latest generation of high performance server microprocessors are generated using integrated switched mode dc-dc converters also known as Fully Integrated Voltage regulators (FIVR). The multi-domain FIVRs in the chip share a common input power supply and the input voltage ripple can be quite high when all of them switch together. The modeling of the input voltage ripple in multi-domain FIVRs using circuit simulation tools such as SPICE is a tedious task. This paper proposes a simple method to accurately model the steady state input voltage ripple using the Harmonic Domain (HD) method.