Device layout dimension impact on substrate effective resistivity

摘要

In this paper, the dependence of substrate effective resistivity on device dimensions is investigated through the measurements and simulations of CPW lines integrated on commercial flavors of high-resistivity (HR) and trap-rich (TR) wafers. It is shown that inhomogeneous resistivity profiles are responsible for the strong dependence of the effective resistivity parameter on device dimensions, up to a factor of 4 on TR substrates and up to a factor of 20 on HR substrates.