A Ka-Band Asymmetric Dual Input CMOS SOI Doherty Power Amplifier with 25 dBm Output Power and High Back-Off Efficiency

摘要

An asymmetric dual input Doherty power amplifier (PA) in 45nm CMOS SOI for Ka-band applications is presented. The PA achieves saturated output power of 25dBm. The PA uses a 2-stack cell in the main path and a 4-stack cell in the peaking path, thus improving efficiency at more than 6 dB back-off and achieving high output power. With dual inputs, the power split between main and peaking paths can be optimized. With symmetric input power split, the 8 dB back-off PAE is 21%, while with asymmetric drive the corresponding value reaches 34%. The peak PAE for both cases is nearly equal and reaches 31%. Low Doherty combiner loss of less than 0.9 dB is achieved using a recently developed combiner synthesis technique. The PA occupies overall chip area of only 0.63 mm^{2, including pads.}