A hash based architecture of longest prefix matching for fast IP processing

摘要

A novel hardware architecture of longest prefix match (LPM) search scheme based on hashing and controlled prefix expansion has been presented to achieve fast IP processing. The main idea of this architecture is to simplify the required hash functions and implemented in hardware for faster generation of addresses of the routing tables. The routing table has been implemented using SRAM to accommodate huge number of prefixes for real time packet forwarding. It is also to be noted that this architecture consumes one memory cycle to store new prefixes, search prefixes and modify existing prefixes and is reducing memory requirement unlike conventional and existing LPM solutions.