An integrated full-duplex transceiver based on novel self-interference suppression solution including non-ideality analysis

摘要

Co-time and co-frequency full-duplex (CCFD) is an effective technology with promising application prospect in improving the spectrum efficiency for wireless communication. However, it was viewed as impossible not too long ago for its sever self-interference. In this work, a novel intermediate frequency self-interference suppression solution with a symmetrical reconstruction path is proposed, based on which a single antenna and single chip integrated CCFD transceiver is realized. The proposed CCFD transceiver adopts an N-phase passive mixer (NPPM) first architecture, where the NPPM is interfaced directly to the antenna. Furthermore, to suppress the non-ideality of clock overlap of the NPPM, which is the fundamental component and directly decides the performance of the full CCFD transceiver, an overlap safeguard factor is introduced. The CCFD transceiver including the self-interference suppression solution and the validity of the overlap safeguard factor in suppressing clock overlap are simulated and verified under Cadence Spectre RF platform. The simulation results show that the smallest self-interference suppression depth is 34dB and it increased proportionally with the increasing of the transmitting power under ideal impedance match. The proposed overlap safeguard factor can also guarantee good impedance match performance even a clock overlap as big as 4% exists.