A new method, using N-terminal network, for analog testing electronic circuits is presented. During test mode the circuit under test is connected to an active N-terminal network. The structure and values of elements of this network are selected to obtain best identification of faults. The proposed N-terminal based test (N-tBT) method consist of 4 stages. This paper is focused on the 2nd stage of this method namely on searching groups and layouts. The heuristic method for searching groups and layouts problem using Particle Swarm Optimization (PSO) algorithm has been proposed.
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