A SVPWM for reduction in common mode and bearing currents applied to diode clamped three-level inverter fed induction motor

摘要

PWM inverters used in motor drives produce high frequency Common Mode Voltages (CMV) which results in Common Mode (CM) currents and bearing currents due to parasitic capacitances. These currents cause abominable effects in electronics devices and develop voltage at motor shaft. When voltage exceeds dielectric breakdown voltage of lubricant film, it develops a huge bearing current which can damage bearings in very short interval. This paper emphasis on mitigation of CM currents and bearing currents by minimizing CMV produced by inverter-motor system based on selection and refinement of PWM algorithm without any additional hardware change. Multilevel inverters are apt for industrial applications due to low voltage distortion and less stress on switching devices than conventional two level inverter. To Investigate the effects on CMV, CM currents, bearing currents and motor shaft voltage, a high frequency Induction Motor (IM) model was chosen and analysis was done with different PWM techniques. The present work focused on three level Diode Clamped MultiLevel Inverter (DCMLI) and proposed new Space vector Pulse width Modulation (SVPWM) by choosing reductant CMV vectors in combination with sequence of changing one state in phase during switching transition. The proposed SVPWM technique shows the effectiness to reduce CMV as well as Electro-Magnetic Interference (EMI) and validated using MATLAB simulations.