SYSTEM AND CIRCUITS FOR ELIMINATING BEARING CURRENTS IN INDUCTION MOTOR FED INVERTERS

摘要

A bearing current elimination circuit for an induction motor fed multi-level inverter is disclosed. The bearing current elimination circuit includes a fourth arm circuit (FAC) connected in parallel to a Neutral-point-clamped Inverter MLI (NPC-MLI) that is configured to generate a current of magnitude equal to a bearing current generated by the NPC-MLI in a direction opposite to a direction of the bearing current when operated at a switching sequence. A control circuit comprising a switching selection circuit is configured to select a switching state to be provided to the NPC-MLI C. A selected switch mapping circuit of the control circuit is configured to map the switching state of the NPC-MLI to the switching sequence to be provided to the FAC. FIG.1