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A 4 dBm IP1dB 20.8 dBm UP3 wideband complementary SF feedback LNTA with derivative superposition method

机译:采用导数叠加法的4 dBm IP1dB 20.8 dBm UP3宽带互补SF反馈LNTA

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A wideband low-noise transconductance amplifier (LNTA) with high linearity is proposed for SAW-less applications. Complementary source-follower and common-source stage are adopted to solve the second-order nonlinear feedback problem. Derivative superposition (DS) method is employed to decrease the second- and third-order nonlinearity of the main path. Moreover, large-signal input matching performance is preserved due to the push-pull operation. Designed in a 0.18-μm CMOS process, the simulation results show that it provides a minimum noise figure (NF) of 2.4 dB, and a maximum trans-conductance of 81 mS from 0.17 to 3.17 GHz. An input 1-dB compression/desensitization point of 4.14/1.58 dBm and an IIP3 of 20.8 dBm are obtained, respectively. The input matching performance is maintained even with a 6 dBm blocker, and the blocker NF is 3.1 dB under a 0 dBm blocker. The circuit draws 9.1 mA from a 1.8 V supply and the core area is only 0.068 mm2.
机译:针对无声表面波的应用,提出了一种具有高线性度的宽带低噪声跨导放大器(LNTA)。采用互补源跟随器和共源级来解决二阶非线性反馈问题。采用导数叠加(DS)方法来减小主路径的二阶和三阶非线性。此外,由于推挽操作,大信号输入匹配性能得以保留。仿真结果显示,在0.18μmCMOS工艺中设计,在0.17至3.17 GHz的频率范围内,其噪声系数(NF)最低,为2.4 dB,最大跨导为81 mS。分别获得4.14 / 1.58 dBm的输入1-dB压缩/减敏点和20.8 dBm的IIP3。即使使用6 dBm的阻塞器,也可以保持输入匹配性能,在0 dBm的阻塞器下,阻塞器NF为3.1 dB。该电路从1.8 V电源汲取9.1 mA电流,核心面积仅为0.068 mm2。

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