This paper presents a mixed-signal outphasing RF-PWM modulator with improved time resolution and high dynamic range realized in 40nm CMOS. Phase shifting is implemented using synchronously tapped analog delay lines comprising integrated L and C devices and achieving a fine-step delay of 2 ps while occupying acceptable silicon area and consuming zero power. The analog outputs of the delay lines are converted to CMOS-compatible square pulses that drive an AND gate which generates RF-PWM pulses with minimum pulse width of 10ps on a 50-Ohm load. According to system-integrated modulator co-simulation results, an ACLR of -45dBc is achieved from a 40 MHz baseband signal on a 2.65 GHz carrier.
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