A 64-channel ultra-low power bioelectric signal acquisition system for brain-computer interface

摘要

A 64-channel bioelectric signal acquisition system incorporating a CMOS ultra-low power amplifier array and serializer integrated circuit (IC) is presented. Each amplifier within the array employs a complementary differential topology with cross-coupled-pair active load to achieve ultra-low power and low-noise operation for a nominal gain of 39 dB. The serializer utilizes zero-power complementary switch network which is controlled by an on-chip synchronous counter-based control circuitry. Fabricated in a 130 nm CMOS process with an area of 5.45 mm2 (excluding pads), the IC is designed to operate in the weak inversion region, resulting in an estimated total power consumption of 14 μW. Each amplifier consumes 216 nW from 0.4 V supply and occupies 0.044 mm2 of die area. The measured input-referred voltage noise across 190 Hz of amplifier's bandwidth is 2.19 μVRMS, corresponding to a power efficiency factor of 11.7. Experiments show that this system effectively amplifies human electroencephalographic and electromyographic signals.