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Frequency doublers with 10.2/5.2 dBm peak power at 100/202 GHz in 45nm SOI CMOS

机译:在45nm SOI CMOS中在100/202 GHz时具有10.2 / 5.2 dBm峰值功率的倍频器

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This paper presents frequency doublers with high output power for millimeter-wave applications. The circuits are fabricated using a 45nm SOI CMOS technology. A new circuit topology, combining a push-push doubler core with a cascaded stacked amplifier, has been implemented to increase the output power. The first doubler delivers 10.2 dBm peak power at 100 GHz output, with a 3-dB bandwidth from 88 to 104 GHz and DC-RF efficiency of 4.1%, while the second doubler has 5.2 dBm peak power at 202 GHz, with a 3-dB bandwidth from 180 to 212 GHz and DC-RF efficiency of 3.3%. To the authors' knowledge, these are the highest powers reported for silicon frequency doublers in similar frequency ranges to date. The 200 GHz doubler also provides the highest on-chip power from a single-element signal generation circuit without power combining.
机译:本文提出了毫米波应用中具有高输出功率的倍频器。这些电路是使用45nm SOI CMOS技术制造的。已经实现了一种新的电路拓扑结构,该结构将推挽式倍频器内核与级联的堆叠放大器相结合,以提高输出功率。第一个倍频器在100 GHz输出时提供10.2 dBm峰值功率,在88至104 GHz范围内具有3-dB带宽,DC-RF效率为4.1%,而第二个倍频器在202 GHz时具有5.2 dBm峰值功率,而3- 180至212 GHz的dB带宽,DC-RF效率为3.3%。据作者所知,这是迄今为止在相似频率范围内硅倍频器报告的最高功率。 200 GHz倍频器还可以在不进行功率合并的情况下从单元素信号生成电路提供最高的片上功率。

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