A 0.13#x03BC;m CMOS UWB receiver front-end using passive mixer

摘要

This paper presents the design of a direct conversion receiver front-end for UWB application. Its key feature is a wideband balun-coupled noise cancelling transconductance input stage, followed by double-balanced quadrature passive mixers and transimpedance loading amplifiers. Simulation results show that the front-end achieves an input return loss (S11) below −10dB between 3–5GHz, a voltage conversion gain (CG) of 22dB, a minimum noise figure of 3.3dB, and a third order intermodulation intercept point (IIP3) of -14dBm. Designed in 0.13μm CMOS technology, it consumes 18mA from a 1.2V supply, including the on-chip quadrature local oscillator (LO) generation and buffer circuits.