A Low-Voltage 5.8-GHz Complementary Metal Oxide Semiconductor Transceiver Front-End Chip Design for Dedicated Short-Range Communication Application

摘要

A 5.8-GHz transceiver front-end applied in dedicated short-range communication (DSRC) systems which is developed in public traffic transportation to improve the safety is fabricated on a chip using TSMC 0.18-μm CMOS process. The proposed prototype includes an asymmetric T/R switch, a current-reused LNA, and a class A power amplifier (PA) on the low-voltage operation in order to minimize the power consumption. Measured results achieve the power gain of 11 dB, the NF of 4.9 dB, the third-order intercept point (IIP3) of -5.4 dBm, and the power consumption of 3.9 mW in the receiving (Rx) mode. On the other hand, the power gain of 12.4 dB, the output 1 dB compression point (OP_(-1dB)) of 11.4 dBm, the PAE of 14.7 % at P_(-1dB), the IMD3 of -15.8 dBc at 1 dB compression level, the output power of 2.6 dBm with a 50 Ω load, and power consumption of 116.3 mW are obtained in the transmitting (Tx) mode. The overall chip area is 1.5 (1.32 × 1.14) mm~2. This RF CMOS transceiver front-end includes all matching circuits and biasing circuits, and no external components are required.