Massively parallel signal processing challenges within a driver assistant prototype framework first case study results with a novel MIMO-radar

摘要

Real-time constraints, mounting space and power limitations of radar sensors and its corresponding signal processing needs are always in conflict with the available computational requirements. This paper presents a prototype design for a heterogeneous MIMO-Radar system that automatically scales with the amount of prevailing data throughput. An important measure is to partition the different processing units of the radar system according to the characteristics of the consecutive signal processing steps. These characteristics range from low-level, massive parallel number crunching to very complex, more stream-oriented and often branching high-level tasks with sophisticated reasoning and decision taking. The handling and real-time processing of extremely high data-rates in the order of tens of Gigabit per second is a new aspect that can only be solved outside the familiar and typically used PC-based development platforms. A new hardware framework is introduced that enables rapid prototyping of a computational very intensive real time system on a FPGA based processing unit. With the help of cost model based design space exploration (DSE) techniques it becomes possible to estimate the hardware effort of such a system in its very early development stage. The necessary cost models for a DSE of the challenging signal processing blocks of a MIMO radar will be derived in future work to further improve the design process.