AAS-Maps: Aging-aware sensitivity-maps for reliability driven analog circuit design

摘要

Analog design is facing new challenges as reliability requirements are increasingly moving into focus for target specifications. Methods providing a degradation-aware design flow exist, but mostly involve algorithmic optimization and lack of computational efficiency and circuit insight. This paper proposes the use of aging-aware sensitivity maps generated by operating point-dependent degradation within the gm/Id scheme. Sensitivity values proof to be a good measure for circuit degradation. Different designs of a common source amplifier structure are investigated by comparing aging sensitivities and simulated degradation. The results show that in opposition to existing methods this technique enables aging-aware design during design phase with comparatively low computational effort.