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5.2 Distributed system of digitally controlled microregulators enabling per-core DVFS for the POWER8TM microprocessor

机译:5.2分布式数字控制微调节器系统,为POWER8 TM 微处理器实现每核DVFS

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Integrated voltage regulator modules (iVRMs) [1] provide a cost-effective path to realizing per-core dynamic voltage and frequency scaling (DVFS), which can be used to optimize the performance of a power-constrained multi-core processor. This paper presents an iVRM system developed for the POWER8TM microprocessor, which functions as a very fast, accurate low-dropout regulator (LDO), with 90.5% peak power efficiency (only 3.1% worse than an ideal LDO). At low output voltages, efficiency is reduced but still sufficient to realize beneficial energy savings with DVFS. Each iVRM features a bypass mode so that some of the cores can be operated at maximum performance with no regulator loss. With the iVRM area including the input decoupling capacitance (DCAP) (but not the output DCAP inherent to the cores), the iVRMs achieve a power density of 34.5W/mm2, which exceeds that of inductor-based or SC converters by at least 3.4× [2].
机译:集成稳压器模块(iVRM)[1]为实现每核动态电压和频率缩放(DVFS)提供了一条经济有效的途径,该途径可用于优化功耗受限的多核处理器的性能。本文介绍了为POWER8 TM 微处理器开发的iVRM系统,该系统用作快速,精确的低压降稳压器(LDO),峰值功率效率为90.5%(仅比理想功率低3.1%)我愿意)。在低输出电压下,效率会降低,但仍然足以通过DVFS实现有益的节能。每个iVRM均具有旁路模式,因此某些内核可在不损失调节器的情况下以最佳性能运行。由于iVRM区域包括输入去耦电容(DCAP)(但不包括内核固有的输出DCAP),因此iVRM的功率密度为34.5W / mm 2 ,超过了电感器的功率密度。基本或SC转换器至少3.4倍[2]。

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