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A dynamically reconfigurable Field Programmable Gate Array hardware foundation for security applications

机译:用于安全应用的动态可重新配置的现场可编程门阵列硬件基础

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As Field Programmable Gate Arrays (FPGAs) become more widely used, security concerns have been raised regarding FPGA use for cryptographic, sensitive, or proprietary data [7]. Storing or implementing proprietary code and designs on FPGAs could result in the compromise of sensitive information if the FPGA device was physically relinquished or remotely accessible to adversaries seeking to obtain the information. A Hardware Description Language (HDL) FPGA architecture supporting dynamic reconfiguration through granular reconfiguration control is presented for use in security applications. Testing validates the reconfiguration results and compares power usage, timing, and area estimates from a conventional and Dynamically Reconfigurable FPGA (DRFPGA) model.
机译:作为现场可编程门阵列(FPGA)变得更广泛地,已经提出了关于加密,敏感或专有数据的FPGA使用的安全问题[7]。在FPGA上存储或实施专有代码和设计可能导致敏感信息的妥协如果FPGA设备物理放弃或远程可供寻求获取信息的对手。支持通过粒度重新配置控制的支持动态重新配置的硬件描述语言(HDL)FPGA架构用于安全应用程序。测试验证重新配置结果并比较传统和动态可重新配置的FPGA(DRFPGA)模型的功率使用,时序和面积估计。

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