首页> 外文会议>IEEE Custom Integrated Circuits Conference >A Sub 1μW Switched Source + Capacitor Architecture Free of Top/Bottom Plate Parasitic Switching Loss Achieving Peak Efficiency of 80.66 at a Regulated 1.8V Output in 180nm
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A Sub 1μW Switched Source + Capacitor Architecture Free of Top/Bottom Plate Parasitic Switching Loss Achieving Peak Efficiency of 80.66 at a Regulated 1.8V Output in 180nm

机译:SUB1μW开关源+电容器架构无顶/底板寄生切换损耗在180nm的调节1.8V输出时实现80.66%的峰值效率

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This paper presents a 25nW-2.4μW switchedcapacitor based energy harvester. The proposed harvester avoids charging and discharging of top and bottom plate parasitic capacitors by switching both the terminals of energy source as opposed to switching just one terminal. As a result, the energy lost in switching the top and bottom plate parasitic capacitors is zero joules, which helps to achieve highly efficient switched capacitor architecture for harvesting sub 1μW energy. The proposed harvester achieves and efficiency of 80% while delivering 1μW output and achieves a peak efficiency of 80.66% at 2.4μW output. It occupies an area of 1.95mm2 in 180nm CMOS.
机译:本文介绍了基于25NW-2.4μW的SwitchedCapacitor基于Energy Harvester。所提出的收割机通过切换电源的端子而不是切换一个终端,避免了顶板和底板寄生电容的充电和放电。结果,在开关顶板和底板寄生电容器中损失的能量是零焦耳,这有助于实现用于收集SUB1μW能量的高效开关电容器架构。拟议的收割机达到80%的效率,同时提供1μW输出,并在2.4μW输出时实现80.66%的峰值效率。它在180nm CMOS中占据1.95mm2的面积。

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