Design Techniques of Integrated Power Management Circuits for Low Power Edge Devices

摘要

Edge devices are essential elements for Internet of Things (1oT). To extend the battery life or achieve batteryless operation through energy harvesting, low power consumption is one of the key challenges for low-power edge devices. For emerging applications, edge devices are likely to be deployed into space constrained environments, thus, design techniques targeting a smaller form factor are desired. As an indispensable type of circuit in highly integrated systems-on-chip (SoCs), power management circuits are important to achieve low power, high energy efficiency, and small area. The challenges of low power and small area set apart the design methodology of PMUs in low-power edge devices from those used in high performance systems. This paper provides a review of design techniques in power management circuits for low-power edge devices, and discusses new trends in power management circuits.